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PIC18F85J11 FAMILY
DS39774D-page 134
2010 Microchip Technology Inc.
11.4
PORTC, TRISC and
LATC Registers
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding Data Direction and Output Latch registers are
TRISC and LATC. Only PORTC pins, RC2 through
RC7, are digital only pins and can tolerate input
voltages up to 5.5V.
PORTC is multiplexed with CCP, MSSP and EUSART
peripheral functions (Table 11-7). The pins have
Schmitt Trigger input buffers. The pins for CCP, SPI
and EUSART are also configurable for open-drain out-
put whenever these functions are active. Open-drain
configuration is selected by setting the SPIOD,
CCPxOD and U1OD control bits (TRISG<7:5> and
LATG<6>, respectively).
RC1 is normally configured as the default peripheral
pin for the CCP2 module. Assignment of CCP2 is
controlled by Configuration bit, CCP2MX (default state,
CCP2MX = 1).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an output,
while other peripherals override the TRIS bit to make a
pin an input. The user should refer to the corresponding
peripheral section for the correct TRIS bit settings.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 11-3:
INITIALIZING PORTC
Note:
These pins are configured as digital inputs
on any device Reset.
CLRF
PORTC
; Initialize PORTC by
; clearing output
; data latches
CLRF
LATC
; Alternate method
; to clear output
; data latches
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISC
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
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